Transcend Information Computer Hardware CF100I User Manual

Transcend Industrial CF Card  
(TS128M ~ 16GCF100I)  
Description  
Features  
The Transcend CF100I is a High Speed industrial  
Compact Flash Card with high quality Flash Memory  
assembled on a printed circuit board.  
CompactFlash Specification Version 4.1 Complaint  
RoHS compliant products  
Single Power Supply: 3.3V 5% or 5V 10%  
Operating Temperature: -40oC to 85oC  
Storage Temperature: -55oC to 100oC  
Operation Modes:  
Placement  
PC Card Memory Mode  
PC Card IO Mode  
True IDE Mode  
True IDE Mode supports:  
Ultra DMA Mode 0 to Ultra DMA Mode 4  
Multi-Word DMA Mode 0 to Multi-Word DMA Mode 4  
PIO Mode 0 to PIO Mode 6  
(Series of –P Only support PIO Mode 0 to PIO Mode  
4, please see Order Information)  
True IDE Mode: Fixed Disk (Standard)  
PC Card Mode: Fixed Disk (Standard)  
Durability of Connector: 10,000 times  
Endurance: 2,000,000 Program/Erase cycles  
MTBF: 1,000,000 hours  
Support Wear-Leveling to extend product life  
Support S.M.A.R.T (Self-defined)  
Support Security Command  
Dimensions  
Compliant to CompactFlash, PCMCIA, and ATA  
standards  
Mechanical Shock Test: 1500G  
Vibration Test: 20G (Peak-to-Peak)  
20Hz to 2000Hz (Frequency)  
Transcend Information Inc.  
1
V1.1  
 
Transcend Industrial CF Card  
(TS128M ~ 16GCF100I)  
Transcend  
Transcend Information Inc.  
3
V1.1  
 
Transcend Industrial CF Card  
(TS128M ~ 16GCF100I)  
Block Diagram  
Transcend Information Inc.  
4
V1.1  
 
Transcend Industrial CF Card  
(TS128M ~ 16GCF100I)  
Pin Assignments and Pin Type  
Transcend Information Inc.  
5
V1.1  
 
Transcend Industrial CF Card  
(TS128M ~ 16GCF100I)  
Note: 1) These signals are required only for 16 bit accesses and not required when installed in 8 bit  
systems. Devices should allow for 3-state signals not to consume current.  
2) The signal should be grounded by the host.  
3) The signal should be tied to VCC by the host.  
4) The mode is required for CompactFlash Storage Cards.  
5) The -CSEL signal is ignored by the card in PC Card modes. However, because it is not  
pulled upon the card in these modes, it should not be left floating by the host in PC Card  
modes. In these modes, the pin should be connected by the host to PC Card A25 or  
grounded by the host.  
6) If DMA operations are not used, the signal should be held high or tied to VCC by the host. For  
proper operation in older hosts: while DMA operations are not active, the card shall ignore  
this signal,including a floating condition  
7) Signal usage in True IDE Mode except when Ultra DMA mode protocol is active.  
8) Signal usage in True IDE Mode when Ultra DMA mode protocol DMA Write is active.  
9) Signal usage in True IDE Mode when Ultra DMA mode protocol DMA Read is active.  
10) Signal usage in PC Card I/O and Memory Mode when Ultra DMA mode protocol DMA Write is active.  
11) Signal usage in PC Card I/O and Memory Mode when Ultra DMA mode protocol DMA Read is active.  
12) Signal usage in PC Card I/O and Memory Mode when Ultra DMA protocol is active.  
Transcend Information Inc.  
6
V1.1  
 
Transcend Industrial CF Card  
(TS128M ~ 16GCF100I)  
Signal Description  
Signal Name  
A10 – A00  
Dir.  
I
Pin  
Description  
8,10,11,12, These address lines along with the -REG signal are used to select the following:  
14,15,16,17, The I/O port address registers within the CompactFlash Storage Card , the  
(PC Card Memory Mode)  
18,19,20  
memory mapped port address registers within the CompactFlash Storage Card,  
a byte in the card's information structure and its configuration control and status  
registers.  
A10 – A00  
This signal is the same as the PC Card Memory Mode signal.  
(PC Card I/O Mode)  
A02 - A00  
18,19,20  
In True IDE Mode, only A[02:00] are used to select the one of eight registers  
in the Task File, the remaining address lines should be grounded by the  
host.  
I
(True IDE Mode)  
BVD1  
I/O  
46  
This signal is asserted high, as BVD1 is not supported.  
(PC Card Memory Mode)  
-STSCHG  
This signal is asserted low to alert the host to changes in the READY and Write  
Protect states, while the I/O interface is configured. Its use is controlled by the  
Card Config and Status Register.  
(PC Card I/O Mode)  
Status Changed  
-PDIAG  
In the True IDE Mode, this input / output is the Pass Diagnostic signal in the  
Master / Slave handshake protocol.  
(True IDE Mode)  
BVD2  
I/O  
45  
This signal is asserted high, as BVD2 is not supported.  
(PC Card Memory Mode)  
-SPKR  
This line is the Binary Audio output from the card. If the Card does not support  
the Binary Audio function, this line should be held negated.  
(PC Card I/O Mode)  
-DASP  
In the True IDE Mode, this input/output is the Disk Active/Slave Present signal in  
the Master/Slave handshake protocol.  
(True IDE Mode)  
-CD1, -CD2  
O
26,25  
These Card Detect pins are connected to ground on the CompactFlash Storage  
Card. They are used by the host to determine that the CompactFlash Storage  
Card is fully inserted into its socket.  
(PC Card Memory Mode)  
-CD1, -CD2  
This signal is the same for all modes.  
This signal is the same for all modes.  
(PC Card I/O Mode)  
-CD1, -CD2  
(True IDE Mode)  
Transcend Information Inc.  
7
V1.1  
 
Transcend Industrial CF Card  
(TS128M ~ 16GCF100I)  
Signal Name  
-CE1, -CE2  
Dir.  
I
Pin  
Description  
These input signals are used both to select the card and to indicate to the card  
whether a byte or a word operation is being performed. -CE2 always accesses  
the odd byte of the word.-CE1 accesses the even byte or the Odd byte of the  
word depending on A0 and -CE2. A multiplexing scheme based on A0,-CE1,  
-CE2 allows 8 bit hosts to access all data on D0-D7. See Table 27, Table 29,  
Table 31, Table 35, Table 36 and Table 37.  
7,32  
(PC Card Memory Mode)  
Card Enable  
This signal is the same as the PC Card Memory Mode signal.  
-CE1, -CE2  
(PC Card I/O Mode)  
Card Enable  
In the True IDE Mode, -CS0 is the address range select for the task file  
registers while -CS1 is used to select the Alternate Status Register and the  
Device Control Register.  
-CS0, -CS1  
(True IDE Mode)  
While –DMACK is asserted, -CS0 and –CS1 shall be held negated and the  
width of the transfers shall be 16 bits.  
-CSEL  
I
39  
This signal is not used for this mode, but should be connected by the host to PC  
Card A25 or grounded by the host.  
(PC Card Memory Mode)  
-CSEL  
This signal is not used for this mode, but should be connected by the host to PC  
Card A25 or grounded by the host.  
(PC Card I/O Mode)  
-CSEL  
This internally pulled up signal is used to configure this device as a Master or a  
Slave when configured in the True IDE Mode.  
(True IDE Mode)  
When this pin is grounded, this device is configured as a Master.  
When the pin is open, this device is configured as a Slave.  
D15 - D00  
(PC Card Memory Mode)  
31,30,29,28,  
27,49,48,47,  
6,5,4,3,2,  
I/O  
These lines carry the Data, Commands and Status information between the host  
and the controller. D00 is the LSB of the Even Byte of the Word. D08 is the LSB  
of the Odd Byte of the Word.  
23, 22, 21  
This signal is the same as the PC Card Memory Mode signal.  
D15 - D00  
(PC Card I/O Mode)  
D15 - D00  
(True IDE Mode)  
In True IDE Mode, all Task File operations occur in byte mode on the low order  
bus D[7:0] while all data transfers are 16 bit using D[15:0].  
GND  
--  
1,50  
Ground.  
(PC Card Memory Mode)  
GND  
This signal is the same for all modes.  
This signal is the same for all modes.  
(PC Card I/O Mode)  
GND  
(True IDE Mode)  
Transcend Information Inc.  
8
V1.1  
 
Transcend Industrial CF Card  
(TS128M ~ 16GCF100I)  
Signal Name  
-INPACK  
(PC Card Memory Mode)  
Dir.  
O
Pin  
Description  
This signal is not used in this mode.  
43  
The Input Acknowledge signal is asserted by the CompactFlash Storage Card  
when the card is selected and responding to an I/O read cycle at the address  
that is on the address bus. This signal is used by the host to control the enable of  
any input data buffers between the CompactFlash Storage Card and the CPU.  
-INPACK  
(PC Card I/O Mode)  
Input Acknowledge  
This signal is a DMA Request that is used for DMA data transfers between host  
and device. It shall be asserted by the device when it is ready to transfer data to  
or from the host. For Multiword DMA transfers, the direction of data transfer is  
controlled by -IORD and -IOWR. This signal is used in a handshake manner with  
-DMACK, i.e., the device shall wait until the host asserts -DMACK before  
negating DMARQ, and reasserting DMARQ if there is more data to transfer.  
DMARQ  
(True IDE Mode)  
DMARQ shall not be driven when the device is not selected.  
While a DMA operation is in progress, -CS0 and –CS1 shall be held negated and  
the width of the transfers shall be 16 bits.  
If there is no hardware support for DMA mode in the host, this output signal is not  
used and should not be connected at the host. In this case, the BIOS must report  
that DMA mode is not supported by the host so that device drivers will not  
attempt DMA mode.  
A host that does not support DMA mode and implements both PCMCIA and  
True-IDE modes of operation need not alter the PCMCIA mode connections  
while in True-IDE mode as long as this does not prevent proper operation in any  
mode.  
-IORD  
(PC Card Memory Mode)  
I
34  
This signal is not used in this mode.  
This is an I/O Read strobe generated by the host. This signal gates I/O data onto  
the bus from the CompactFlash Storage Card when the card is configured to use  
the I/O interface.  
-IORD  
(PC Card I/O Mode)  
In True IDE Mode, while Ultra DMA mode is not active, this signal has the same  
function as in PC Card I/O Mode.  
-IORD  
(True IDE Mode – Except  
Ultra DMA Protocol Active)  
-HDMARDY  
(True IDE Mode – In Ultra  
DMA Protocol DMA Read)  
In True IDE Mode when Ultra DMA mode DMA Read is active, this signal is  
asserted by the host to indicate that the host is read to receive Ultra DMA data-in  
bursts. The host may negate -HDMARDY to pause an Ultra DMA transfer.  
In True IDE Mode when Ultra DMA mode DMA Write is active, this signal is the  
data out strobe generated by the host. Both the rising and falling edge of  
HSTROBE cause data to be latched by the device. The host may stop  
generating HSTROBE edges to pause an Ultra DMA data-out burst.  
HSTROBE  
(True IDE Mode – In Ultra  
DMA Protocol DMA Write)  
Transcend Information Inc.  
9
V1.1  
 
Transcend Industrial CF Card  
(TS128M ~ 16GCF100I)  
Signal Name  
-IOWR  
Dir.  
I
Pin  
Description  
This signal is not used in this mode.  
35  
(PC Card Memory Mode)  
-IOWR  
The I/O Write strobe pulse is used to clock I/O data on the Card Data bus into  
the CompactFlash Storage Card controller registers when the CompactFlash  
Storage Card is configured to use the I/O interface.  
(PC Card I/O Mode)  
The clocking shall occur on the negative to positive edge of the signal (trailing  
edge).  
-IOWR  
In True IDE Mode, while Ultra DMA mode protocol is not active, this signal has  
the same function as in PC Card I/O Mode. When Ultra DMA mode protocol is  
supported, this signal must be negated before entering Ultra DMA mode  
protocol.  
(True IDE Mode – Except  
Ultra DMA Protocol Active)  
STOP  
In True IDE Mode, while Ultra DMA mode protocol is active, the assertion of this  
signal causes the termination of the Ultra DMA burst.  
(True IDE Mode – Ultra DMA  
Protocol Active)  
-OE  
(PC Card Memory Mode)  
This is an Output Enable strobe generated by the host interface. It is used to  
read data from the CompactFlash Storage Card in Memory Mode and to read  
the CIS and configuration registers.  
I
9
In PC Card I/O Mode, this signal is used to read the CIS and configuration  
registers.  
-OE  
(PC Card I/O Mode)  
-ATA SEL  
(True IDE Mode)  
To enable True IDE Mode this input should be grounded by the host.  
READY  
(PC Card Memory Mode)  
In Memory Mode, this signal is set high when the CompactFlash Storage Card is  
ready to accept a new data transfer operation and is held low when the card is  
busy.  
O
37  
At power up and at Reset, the READY signal is held low (busy) until the  
CompactFlash Storage Card has completed its power up or reset function. No  
access of any type should be made to the CompactFlash Storage Card during  
this time.  
Note, however, that when a card is powered up and used with RESET  
continuously disconnected or asserted, the Reset function of the RESET pin is  
disabled. Consequently, the continuous assertion of RESET from the application  
of power shall not cause the READY signal to remain continuously in the busy  
state.  
-IREQ  
(PC Card I/O Mode)  
I/O Operation – After the CompactFlash Storage Card Card has been  
configured for I/O operation, this signal is used as -Interrupt Request. This line is  
strobed low to generate a pulse mode interrupt or held low for a level mode  
interrupt.  
INTRQ  
(True IDE Mode)  
In True IDE Mode signal is the active high Interrupt Request to the host.  
Transcend Information Inc.  
10  
V1.1  
 
Transcend Industrial CF Card  
(TS128M ~ 16GCF100I)  
Signal Name  
Dir.  
I
Pin  
Description  
-REG  
(PC Card Memory Mode)  
Attribute Memory Select  
This signal is used during Memory Cycles to distinguish between Common  
Memory and Register (Attribute) Memory accesses. High for Common Memory,  
Low for Attribute Memory.  
44  
-REG  
(PC Card I/O Mode)  
The signal shall also be active (low) during I/O Cycles when the I/O address is on  
the Bus.  
-DMACK  
(True IDE Mode)  
This is a DMA Acknowledge signal that is asserted by the host in response to  
DMARQ to initiate DMA transfers.  
While DMA operations are not active, the card shall ignore the -DMACK signal,  
including a floating condition.  
If DMA operation is not supported by a True IDE Mode only host, this signal  
should be driven high or connected to VCC by the host.  
A host that does not support DMA mode and implements both PCMCIA and  
True-IDE modes of operation need not alter the PCMCIA mode connections  
while in True-IDE mode as long as this does not prevent proper operation all  
modes.  
RESET  
I
41  
The CompactFlash Storage Card is Reset when the RESET pin is high with the  
following important exception:  
(PC Card Memory Mode)  
The host may leave the RESET pin open or keep it continually high from the  
application of power without causing a continuous Reset of the card. Under  
either of these conditions, the card shall emerge from power-up having  
completed an initial Reset.  
The CompactFlash Storage Card is also Reset when the Soft Reset bit in the  
Card Configuration Option Register is set.  
RESET  
This signal is the same as the PC Card Memory Mode signal.  
(PC Card I/O Mode)  
In the True IDE Mode, this input pin is the active low hardware reset from the  
host.  
-RESET  
(True IDE Mode)  
VCC  
--  
13,38  
+5 V, +3.3 V power.  
(PC Card Memory Mode)  
VCC  
This signal is the same for all modes.  
This signal is the same for all modes.  
(PC Card I/O Mode)  
VCC  
(True IDE Mode)  
Transcend Information Inc.  
11  
V1.1  
 
Transcend Industrial CF Card  
(TS128M ~ 16GCF100I)  
Signal Name  
Dir.  
O
Pin  
Description  
-VS1  
-VS2  
33  
40  
Voltage Sense Signals. -VS1 is grounded on the Card and sensed by the Host  
so that the CompactFlash Storage Card CIS can be read at 3.3 volts and -VS2 is  
reserved by PCMCIA for a secondary voltage and is not connected on the Card.  
(PC Card Memory Mode)  
-VS1  
This signal is the same for all modes.  
-VS2  
(PC Card I/O Mode)  
-VS1  
This signal is the same for all modes.  
-VS2  
(True IDE Mode)  
-WAIT  
(PC Card Memory Mode)  
O
42  
The -WAIT signal is driven low by the CompactFlash Storage Card to signal the  
host to delay completion of a memory or I/O cycle that is in progress.  
-WAIT  
(PC Card I/O Mode)  
This signal is the same as the PC Card Memory Mode signal.  
In True IDE Mode, except in Ultra DMA modes, this output signal may be used  
as IORDY.  
IORDY  
(True IDE Mode – Except  
Ultra DMA Mode)  
In True IDE Mode, when Ultra DMA mode DMA Write is active, this signal is  
asserted by the host to indicate that the device is read to receive Ultra DMA  
data-in bursts. The device may negate -DDMARDY to pause an Ultra DMA  
transfer.  
-DDMARDY  
(True IDE Mode – Ultra DMA  
Write Mode)  
DSTROBE  
(True IDE Mode – Ultra  
DMA Read Mode)  
In True IDE Mode, when Ultra DMA mode DMA Write is active, this signal is the  
data out strobe generated by the device. Both the rising and falling edge of  
DSTROBE cause data to be latched by the host. The device may stop  
generating DSTROBE edges to pause an Ultra DMA data-out burst.  
-WE  
I
36  
This is a signal driven by the host and used for strobing memory write data to the  
registers of the CompactFlash Storage Card when the card is configured in the  
memory interface mode. It is also used for writing the configuration registers.  
(PC Card Memory Mode)  
-WE  
In PC Card I/O Mode, this signal is used for writing the configuration registers.  
(PC Card I/O Mode)  
-WE  
In True IDE Mode, this input signal is not used and should be connected to VCC  
by the host.  
(True IDE Mode)  
Transcend Information Inc.  
12  
V1.1  
 
Transcend Industrial CF Card  
(TS128M ~ 16GCF100I)  
WP  
(PC Card Memory Mode)  
Write Protect  
Memory Mode – The CompactFlash Storage Card does not have a write protect  
switch. This signal is held low after the completion of the reset initialization  
sequence.  
O
24  
-IOIS16  
(PC Card I/O Mode)  
I/O Operation – When the CompactFlash Storage Card is configured for I/O  
Operation Pin 24 is used for the -I/O Selected is 16 Bit Port (-IOIS16) function. A  
Low signal indicates that a 16 bit or odd byte only operation can be performed at  
the addressed port.  
In True IDE Mode this output signal is asserted low when this device is expecting  
a word data transfer cycle.  
-IOCS16  
(True IDE Mode)  
Electrical Specification  
The following tables indicate all D.C. Characteristics for the CompactFlash Storage Card. Unless  
otherwise stated, conditions are:  
Vcc = 5V 10%  
Vcc = 3.3V 5%  
Absolute Maximum Conditions  
Input Power  
Input Leakage Current  
Input Characteristics  
CompactFlash interface I/O at 5.0V  
Parameter  
Symbol  
Min.  
Max.  
Unit  
Remark  
Transcend Information Inc.  
13  
V1.1  
 
Transcend Industrial CF Card  
(TS128M ~ 16GCF100I)  
Supply Voltage  
VCC  
VOH  
VOL  
4.5  
5.5  
0.8  
V
High level output voltage  
Low level output voltage  
VCC-0.8  
V
V
V
4.0  
Non-schmitt trigger  
Schmitt trigger1  
High level input voltage  
VIH  
VIL  
2.92  
V
0.8  
1.70  
73  
V
Non-schmitt trigger  
Schmitt trigger1  
Low level input voltage  
V
Pull up resistance2  
RPU  
RPD  
50.  
50  
kOhm  
kOhm  
Pull down resistance  
97  
CompactFlash interface I/O at 3.3V  
Parameter  
Supply Voltage  
Symbol  
VCC  
Min.  
3.135  
Max.  
Unit  
Remark  
3.465  
V
High level output voltage  
Low level output voltage  
VOH  
VCC-0.8  
V
VOL  
0.8  
V
V
2.4  
Non-schmitt trigger  
Schmitt trigger1  
High level input voltage  
VIH  
VIL  
2.05  
V
0.6  
1.25  
141  
172  
V
Non-schmitt trigger  
Schmitt trigger1  
Low level input voltage  
V
Pull up resistance2  
RPU  
RPD  
52.7  
47.5  
kOhm  
kOhm  
Pull down resistance  
The I/O pins other than CompactFlash interface  
Parameter  
Symbol  
VCC  
Min.  
3.135  
2.4  
Max.  
Unit  
Remark  
Supply Voltage  
3.465  
V
High level output voltage  
Low level output voltage  
VOH  
V
VOL  
0.4  
V
V
2.0  
1.4  
Non-schmitt trigger  
Schmitt trigger  
High level input voltage  
Low level input voltage  
VIH  
VIL  
2.0  
0.8  
1.2  
V
V
Non-schmitt trigger  
Schmitt trigger  
0.8  
40  
40  
V
Pull up resistance  
RPU  
RPD  
kOhm  
kOhm  
Pull down resistance  
1. Include CE1, CE2, HREG, HOE. HIOE, HWE, HIOW pins.  
2. Include CE1, CE2, HREG, HOE. HIOE, HWE, HIOW, CSEL, PDIAG, DASP pins.  
Transcend Information Inc.  
14  
V1.1  
 
Transcend Industrial CF Card  
(TS128M ~ 16GCF100I)  
Output Drive Type  
Output Drive Characteristics  
V1.1  
 
Transcend Industrial CF Card  
(TS128M ~ 16GCF100I)  
Transcend Information Inc.  
16  
V1.1  
 
Transcend Industrial CF Card  
(TS128M ~ 16GCF100I)  
Notes: 1) Control Signals: each card shall present a load to the socket no larger than 50 pF 10 at a DC current of 700  
A
low state and 150 A high state, including pull-resistor. The socket shall be able to drive at least the following  
load 10 while meeting all AC timing requirements: (the number of sockets wired in parallel) multiplied by (50 pF  
with DC current 700 A low state and 150 A high state per socket).  
2) Resistor is optional.  
3) Status Signals: the socket shall present a load to the card no larger than 50 pF 10 at a DC current of 400 A low  
state and 100 A high state, including pull-up resistor. The card shall be able to drive at least the following load  
10 while meeting all AC timing requirements: 50 pF at a DC current of 400 A low state and 100 A high state.  
4) Status Signals: the socket shall present a load to the card no larger than 50 pF 10 at a DC current of 400 A low  
state and 100 A high state, including pull-up resistor. The card shall be able to drive at least the following load  
10 while meeting all AC timing requirements: 50 pF at a DC current of 400 A low state and 100 A high state.  
5) Status Signals: the socket shall present a load to the card no larger than 50 pF 10 at a DC current of 400 A low  
state and 100 A high state, including pull-up resistor. The card shall be able to drive at least the following load  
10 while meeting all AC timing requirements: 50 pF at a DC current of 400 A low state and 1100 A high state.  
6) BVD2 was not defined in the JEIDA 3.0 release. Systems fully supporting JEIDA release 3 SRAM cards shall  
pull-up pin 45 (BVD2) to avoid sensing their batteries as “Low.”  
7) Address Signals: each card shall present a load of no more than 100pF 10 at a DC current of 450 A low state and  
150 A high state. The host shall be able to drive at least the following load 10 while meeting all AC timing  
requirements: (the number of sockets wired in parallel) multiplied by (100pF with DC current 450 A low state  
and 150 A high state per socket).  
8) Data Signals: the host and each card shall present a load no larger than 50pF 10 at a DC current of 450 A and  
150 A high state. The host and each card shall be able to drive at least the following load 10 while meeting all  
AC timing requirements: 100pF with DC current 1.6mA low state and 300 A high state. This permits the host to  
wire two sockets in parallel without derating the card access speeds.  
9) Reset Signal: This signal is pulled up to prevent the input from floating when a CFA to PCMCIA adapter is used  
in a PCMCIA revision 1 host. However, to minimize DC current drain through the pull-up resistor in normal  
operation the pull-up should be turned off once the Reset signal has been actively driven low by the host.  
Consequently, the input is specified as an I2Z because the resistor is not necessarily detectable in the input  
current leakage test.  
10) Host and card restrictions for CF Advanced Timing Modes and Ultra DMA modes: Additional Requirements for  
CF Advanced Timing Modes and Ultra DMA Electrical Requirements for additional required limitations on the  
implementation of CF Advanced Timing modes and Ultra DMA modes respectively.  
Additional Requirements for CF Advanced Timing Modes  
The CF Advanced Timing modes include PCMCIA I/O and Memory modes that are 100ns or faster and True  
IDE PIO Modes 5,6 and Multiword DMA Modes 3,4.  
When operating in CF Advanced timing modes, the host shall conform to the following requirements:  
1) Only one CF device shall be attached to the CF Bus.  
2) The host shall not present a load of more than 40pF to the device for all signals, including any cabling.  
3) The maximum cable length is 0.15 m (6 in). The cable length is measured from the card connector to the host  
controller. 0.46 m (18 in) cables are not supported.  
4) The -WAIT and IORDY signals shall be ignored by the host.  
Devices supporting CF Advanced timing modes shall also support slower timing modes, to ensure operability with  
systems that do not support CF Advanced timing modes  
Transcend Information Inc.  
17  
V1.1  
 
Transcend Industrial CF Card  
(TS128M ~ 16GCF100I)  
Ultra DMA Electrical Requirements  
Host and Card signal capacitance limits for Ultra DMA operation  
The host interface signal capacitance at the host connector shall be a maximum of 25 pF for each signal as measured at  
1 MHz. The card interface signal capacitance at the card connector shall be a maximum of 20 pF for each signal as  
measured at 1 MHz.  
Series termination required for Ultra DMA operation  
Series termination resistors are required at both the host and the card for operation in any of the Ultra DMA modes. Table  
13 describes typical values for series termination at the host and the device.  
Table: Typical Series Termination for Ultra DMA  
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Table: Ultra DMA Termination with Pull-up or Pull down Example  
Printed Circuit Board (PCB) Trace Requirements for Ultra DMA  
On any PCB for a host or device supporting Ultra DMA:  
The longest D[15:00] trace shall be no more than 0.5" longer than either STROBE trace as measured from the  
IC pin to the connector.  
The shortest D[15:00] trace shall be no more than 0.5" shorter than either STROBE trace as measured from  
the IC pin to the connector.  
Ultra DMA Mode Cabling Requirement  
Operation in Ultra DMA mode requires a crosstalk suppressing cable. The cable shall have a grounded line  
between each signal line.  
For True IDE mode operation using a cable with IDE (ATA) type 40 pin connectors it is recommended that the  
host sense the cable type using the method described in the ANSI INCITS 361-2002 AT Attachment - 6  
standard, to prevent use of Ultra DMA with a 40 conductor cable.  
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Transcend Industrial CF Card  
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Attribute Memory Read Timing Specification  
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